PIC18F23K22 Overview
28/40/44-Pin, Low-Power, High-Performance Microcontrollers with XLP Technology High-Performance RISC CPU: • C piler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code • Up to 1024 Bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3896 Bytes Linear Data Memory Address- ing • Up to 16 MIPS Operation • 16-bit Wide Instructions, 8-bit Wide Data Path • Priority Levels for Interrupts • 31-Level, Software Accessible Hardware Stack • 8 x 8 Single-Cycle Hardware Multiplier Flexible Oscillator Structure:
PIC18F23K22 Key Features
- Analog-to-Digital Converter (ADC) module
- 10-bit resolution, up to 30 external channels
- Auto-acquisition capability
- Conversion available during Sleep
- Fixed Voltage Reference (FVR) channel
- Independent input multiplexing
- Analog parator module
- Two rail-to-rail analog parators
- Independent input multiplexing
- Digital-to-Analog Converter (DAC) module