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CEC1302 - Low Power Crypto Embedded Controller

Datasheet Summary

Description

The CEC1302 incorporates a high-performance 32-bit ARM® Cortex®-M4 embedded microcontroller with 128 Kilobytes of SRAM and 32 Kilobytes of Boot ROM.

It communicates with the system host using the I2C bus.

Features

  • ARM® Cortex®-M4 Processor Core - 32-Bit ARM v7-M Instruction Set Architecture - Hardware Floating Point Unit (FPU) - Single 4GByte Addressing Space (Von Neumann Model) - Little-Endian Byte Ordering - Bit-Banding Feature Included - NVIC Nested Vectored Interrupt Controller - Up to 240 Individually-Vectored Interrupt Sources Supported - 8 Levels of Priority, Individually Assignable By Vector - Chip-Level Interrupt Aggregator supported, to expand number of interrupt sources or reduce numb.

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Datasheet preview – CEC1302

Datasheet Details

Part number CEC1302
Manufacturer Microchip
File Size 3.20 MB
Description Low Power Crypto Embedded Controller
Datasheet download datasheet CEC1302 Datasheet
Additional preview pages of the CEC1302 datasheet.

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Full PDF Text Transcription

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CEC1302 Low Power Crypto Embedded Controller Product Features • ARM® Cortex®-M4 Processor Core - 32-Bit ARM v7-M Instruction Set Architecture - Hardware Floating Point Unit (FPU) - Single 4GByte Addressing Space (Von Neumann Model) - Little-Endian Byte Ordering - Bit-Banding Feature Included - NVIC Nested Vectored Interrupt Controller - Up to 240 Individually-Vectored Interrupt Sources Supported - 8 Levels of Priority, Individually Assignable By Vector - Chip-Level Interrupt Aggregator supported, to expand number of interrupt sources or reduce number of vectors - System Tick Timer - Complete ARM-Standard Debug Support - JTAG-Based DAP Port, Comprised of SWJ-DP and AHB-AP Debugger Access Functions - Full DWT Hardware Functionality: 4 Data Watchpoints and Execution Monitoring - Full FPB Har
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