DSPIC33FJ06GS102A Datasheet PDF

FEATURES

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● ADC module: - 10-bit resolution with Successive Approximation Register (SAR) converter (2 Msps) and three Sample-and-Hold (S&H) circuits - Up to 8 input channels grouped into four conversion pairs, plus two inputs for monitoring voltage references - Flexible and independent ADC trigger sources - Dedicated Result register for each analog channel Core: 16-Bit dsPIC33F CPU
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● Code Efficient (C and Assembly) Architecture Two 40-Bit Wide Accumulators Single-Cycle (MAC/MPY) with Dual Data Fetch Single-Cycle Mixed-Sign MUL plus Hardware Divide 32-Bit Multiply Support Clock Management
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● ±2% Internal Oscillator Programmable PLLs and Oscillator Clock Sources Fail-Safe Clock Monitor (FSCM) Independent Watchdog Timer (WDT) Fast Wake-up and Start-up Timers/Output Compare/Input Capture
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● Two 16-Bit General Purpose Timers/Counters Input Capture module Output Compare module Peripheral Pin Select (PPS) to allow Function Remap Communication Interfaces
● UART m...