Microchip Technology LP0701
The LP0701 Enhancement-mode (normally-off) transistor uses a lateral MOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. The low threshold voltage and low on-resistance characteristics are ideally suited for handheld and battery-operated applications.FEATURES
● Ultra-Low Threshold● High Input Impedance
● Low Input Capacitance
● Fast Switching Speeds
● Low On-Resistance
● Freedom from Secondary Breakdown
● Low Input and Output Leakage
APPLICATIONS
● Logic-Level Interfaces● Solid-State Relays
● Battery-Operated Systems
● Photovoltaic Drives
● Analog Switches
● General Purpose Line Drivers
GENERAL DESCRIPTION
Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Package Types 3-lead TO-92 (Top view) SOURCE DRAIN GATE See Table 3-1 and Table 3-2 for pin information. 8-lead SOIC (Top view) D D D D G S NC NC 2018 Microchip Technology Inc. DS20005447A-page 1 LP0701 1.0ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
† Drain-to-Source Voltage ...................................................................................................................................... BVDSS Drain-to-Gate Voltage .........................................................................................................................................