PIC18F27K40
PIC18F27K40 is Memory Programming Specification manufactured by Microchip Technology.
- Part of the PIC18F24K40 comparator family.
- Part of the PIC18F24K40 comparator family.
PIC18(L)F2X/4XK40
PIC18(L)F2X/4XK40 Memory Programming Specification
1.0 OVERVIEW
This programming specification describes an SPI-based programming method for the PIC18(L)F2X/4XK40 family of microcontrollers. Section 3.0 “Programming Algorithms” describes the programming mands, programming algorithms and electrical specifications which are used in that particular programming method. Appendix B contains individual part numbers, device identification and checksum values, pinout and packaging information and Configuration Words.
Note 1: This is a SPI-patible programming method with 8-bit mands. 2: The low-voltage entry code is now 32 clocks and MSb first, unlike previous PIC18 devices which had 33 clocks and LSb first.
1.1 Programming Data Flow
Nonvolatile Memory (NVM) programming data can be supplied by either the high-voltage In-Circuit Serial Programming™ (ICSP™) interface or the low-voltage In-Circuit Serial Programming (ICSP) interface. Data can be programmed into the Program Flash Memory (PFM), Data Flash Memory (EEPROM), dedicated “user ID” locations and the Configuration Words.
1.2 Write and/or Erase Selection
Erasing or writing is selected according to the mand used to begin operation (see Table 3-1). The terminologies used in this document related to erasing/writing to the program memory are defined in Table 1-1 and are detailed below.
TABLE 1-1: PROGRAMMING TERMS
Term
Definition
Programmed Cell Erased Cell Erase Write Program
A memory cell at logic ‘0’ A memory cell at logic ‘1’ Change memory cell from a ‘0’ to a ‘1’ Change memory cell from a ‘1’ to a ‘0’ Generic erase and/or write
1.2.1 ERASING MEMORY
Memory is erased by row or in bulk, where ‘bulk’ includes many subsets of the total memory space. The duration of the erase is determined by the size of program memory. All Bulk ICSP Erase mands have minimum VDD requirements, which are higher than the Row Erase and write requirements.
1.2.2 WRITING MEMORY
Memory is written one row at a...