SAM9G20 Datasheet | Microchip Technology

32-BIT ARM-BASED MICROPROCESSORS Description The SAM9G20 embedded microprocessor unit is based on the integration of an Arm926EJ-S™ processor with fast ROM and RAM memories and a wide range of peripherals. The SAM9G20 embeds an Ethernet MAC, one USB Device Port, and a dual port USB Host controller with on-chip USB transceivers. It also integrates several standard peripherals, such as the USART, SPI, TWI, Timer Counters, Synchronous Serial Controller, ADC and Multi Media Card Interface. The SAM9G20 is architectured on a 6-layer matrix, allowing a maximum internal bandwidth of six 32-bit buses. It also Features an External Bus Interface capable of interfacing with a wide range of memory devices. The SAM9G20 is an enhancement of the SAM9260 with the same peripheral Features . It is pin-to-pin patible with the exception of power supply pins. Speed is increased to reach 400 MHz on the Arm core and 133 MHz on the system bus and EBI. Features - Incorporates the Arm926EJ-S Arm® Thumb® Processor - DSP Instruction Extensions, Arm Jazelle® Technology for Java® Acceleration - 32-Kbyte Data Cache, 32-Kbyte Instruction Cache, Write Buffer - CPU Frequency 400 MHz - Memory Management Unit - Embedded ICE, Debug munication Channel Support - Additional Embedded Memories - One 64-Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed - Two 16-Kbyte Internal SRAM, Single-cycle Access at Maximum Matrix Speed - External Bus Interface (EBI) - Supports SDRAM, Static Memory, ECC-enabled SLC NAND Flash and pact Flash® - USB 2.0 Full Speed (12 Mbit/s) Device Port - On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM - USB 2.0 Full Speed (12 Mbit/s) Host and Dual Port - Single or Dual On-chip Transceivers - Integrated FIFOs and Dedicated DMA Channels - Ethernet MAC 10/100 Base T - Media Independent Interface or Reduced Media Independent Interface - 128-byte FIFOs and Dedicated DMA Channels for Receive and Transmit - Image Sensor Interface - ITU-R BT. 601/656...