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SY100EL52 Datasheet PDF

Microchip Technology SY100EL52

The SY100EL52 is a differential data, differential clock D flip-flop. The differential clock inputs also allow the EL52 to be used as a negative edge triggered device. The EL52 employs input clamping circuitry so that, under open input conditions (pulled down to VEE), the outputs of the device will remain stable.
Part No. SY100EL52
Datasheet SY100EL52 Download
Manufacturer
Microchip Technology
Description 5V ECL Differential Data and Clock D Flip-Flop
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SY100EL52 datasheet page 1 preview

FEATURES

● 365 ps Propagation Delay (typical)
● 2.8 GHz Toggle Frequency (typical)
● Internal 75 kΩ Input Pull-Down Resistors
● Available in 8-Lead SOIC Package

GENERAL DESCRIPTION

Data enters the master portion of the flip-flop when the clock is low and is transferred to the slave, then the outputs, upon a positive transition of the clock. Package Type SY100EL52 8-Lead SOIC (Z) D1 D2 CLK 3 CLK 4 D Flip-Flop 8 VCC 7Q 6Q 5 VEE  2018 Microchip Technology Inc. DS20006066A-page 1 SY100EL52 1.0

ELECTRICAL CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS

† PECL Power Supply Voltage (VCC) (Note 1) ...............................................................................................................+8V NECL Power Supply Voltage (VEE) (Note 2) ...............................................................................................................–8V PECL Mode Input Voltage (VIN) (Note 3) ....................................................................................................................+6V NECL Mode Input Voltage (VIN) (Note 4) ..........................................................................................
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