SY88303BL Datasheet | Microchip Technology

3.3V, 3.2 Gbps CML Limiting Post Amplifier with Wide Loss-of-Signal Detection Range Features - Loss-of-Signal Detection Circuit Optimized to Detect a Wide Input Range - Chatter-Free Open-Collector TTL Loss-of-Signal (LOS) Output - Single 3.3V Power Supply - 155 Mbps to 3.2 Gbps Operation - Low-Noise CML Data Outputs - Programmable LOS Level Set (LOSLVL) - Available in a 16-Lead VQFN Package Applications - PON - Gigabit Ethernet - 1X and 2X Fibre Channel - SONET/SDH: OC 3/12/24/48 - STM 1/4/8/16 - High-Gain Line Driver and Line Receiver Markets - FTTX - Optical Transceivers - Data/Tele - Low-Gain TIA Interface - Long-Reach FOM General Description The SY88303BL low-power limiting post amplifier is designed for use in fiber-optic receivers. This device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88303BL quantizes these signals and output CML-level waveforms. The SY88303BL operates from a single +3.3V power supply, over temperatures ranging from - 40°C to +85°C. With its wide bandwidth and high gain, signals with data rates up to 3.2 Gbps, and as small as 10 m VPP, can be amplified to drive devices with CML/PECL inputs. The device generates a loss-of-signal (LOS) open-collector TTL output. The LOS function is optimized to detect a wide input range, as shown in the typical operating characteristic graphs. A programmable loss-of-signal level-set pin (LOSLVL) sets the sensitivity of the input amplitude detection. LOS asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. The enable bar input (/EN) de-asserts the true output signal without removing the input signal. The LOS output can be fed back to the /EN input to maintain output stability under a loss-of-signal condition. Typically, 3.5 d B LOS hysteresis is provided to prevent chattering. Typical Application Circuit  2021...