Microchip Technology TP2424
The TP2424 low-threshold Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices.| Part No. | TP2424 |
|---|---|
| Datasheet | TP2424 Download |
| Manufacturer |  Microchip Technology |
| Description | P-Channel Vertical DMOS FETs |
| Buy | Stock & Price |
FEATURES
● Low Threshold● High Input Impedance
● Low Input Capacitance
● Fast Switching Speeds
● Free from Secondary Breakdown
● Low Input and Output Leakage
APPLICATIONS
● Logic-Level Interfaces (Ideal for TTL and CMOS)● Solid-State Relays
● Linear Amplifiers
● Analog Switches
● Power Management
● Telecommunication Switches
GENERAL DESCRIPTION
Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Microchip’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance and fast switching speeds are desired. Package Type 3-lead SOT-89 (Top view) DRAIN See Table 2-1 for pin information. SOURCE DRAIN GATE 2019 Microchip Technology Inc. DS20005959A-page 1 TP2424 1.0ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
† Drain-to-Source Voltage ......................................................................................................................................
