ZL30281
Key Features
- 25 MHz Crystal or CMOS Input
- Four Default Configurations Selected by Hardware Pins at Reset
- Config0: 100 MHz on Output OC1 (CML)
- Per-Output Controls (Using SPI or I2C Interface)
- Per-Output Enable/Disable and Glitchless Start/Stop (Stop High or Low)
Applications
- PCIe Gen1 to Gen6 Clock Generation for PCIe Storage Systems, Riser Cards, JBOF, etc
