Microchip Technology ZL30281
Three-Output PCIe Clock Generator
FEATURES
● 25 MHz Crystal or CMOS Input● Generates PCIe 1, 2, 3, 4, 5, 6 Jitter-Compliant Clocks with CML Outputs
● Four Default Configurations Selected by Hardware Pins at Reset: - Config0: 100 MHz on Output OC1 (CML) - Config1: 100 MHz on OC1, OC2 (CML) - Config2: 100 MHz on OC1 (CML), OC2 (HSTL) - Config3: 100 MHz on OC1, OC2 (CML) and 25 MHz LVCMOS on OC3
● Per-Output Controls (Using SPI or I2C Interface) - Per-Output Enable/Disable and Glitchless Start/Stop (Stop High or Low) - Precise Output Alignment Circuitry and PerOutput Phase Adjustment
● SPI or I2C Processor Interface
● Tiny 5 mm x 5 mm VQFN Package
APPLICATIONS
● PCIe Gen1 to Gen6 Clock Generation for PCIe Storage Systems, Riser Cards, JBOF, etc. FIGURE 0-1: Functional Block Diagram. 2022 Microchip Technology Inc. and its subsidiaries DS20006736A-page 1 ZL30281 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products.