Download dsPIC33EP256MU810 Datasheet PDF
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dsPIC33EP256MU810 Description

16-Bit dsPIC33E/PIC24E CPU Code-Efficient (C and Assembly) architecture Two 40-Bit Wide Accumulators Single-Cycle (MAC/MPY) with Dual Data Fetch Single-Cycle Mixed-Sign MUL Plus Hardware Divide 32-Bit Multiply Support Clock Management 2% Internal Oscillator Programmable PLLs and Oscillator Clock Sources Fail-Safe Clock Monitor (FSCM) Independent Watchdog Timer Fast Wake-up and Start-up Power Management Low-Power...

dsPIC33EP256MU810 Key Features

  • Two Independent ADC modules
  • One ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H
  • One 10-bit ADC, 1.1 Msps with four S&H
  • Eight S&H using both ADC 10-bit modules
  • Flexible and Independent ADC Trigger Sources
  • parators
  • Up to three Analog parator modules
  • Programmable references with 32 voltage points
  • 27 General Purpose Timers
  • Nine 16-bit and up to four 32-bit Timers/Counters