Download PIC24FJ128GA204 Datasheet PDF
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PIC24FJ128GA204 Description

Supports 2-Key and 3-Key EDE or DED TDES Supports up to Three Unique Keys for TDES Programmatically Secure Pseudorandom Number Generator True Random Number Generator Non-Readable, On-Chip, OTP Key Storages Extreme Low-Power.

PIC24FJ128GA204 Key Features

  • Multiple Power Management Options for Extreme Power Reduction
  • VBAT allows the device to transition to a backup battery for the lowest power consumption with RTCC
  • Deep Sleep allows near total power-down with the ability to wake-up on internal or external triggers
  • Sleep and Idle modes selectively shut down peripherals and/or core for substantial power reduction and fast wake-up
  • Doze mode allows CPU to run at a lower clock speed than peripherals
  • Alternate Clock modes allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction
  • Extreme Low-Power Current Consumption for Deep Sleep
  • WDT: 270 nA @ 3.3V typical
  • RTCC: 400 nA @ 32 kHz, 3.3V typical
  • Deep Sleep current: 40 nA, 3.3V typical