MT18LD272A Datasheet | Micron Technology

FEATURES - JEDEC-standard, eight-CAS#, ECC pinout in a 168-pin, dual in-line memory module (DIMM) - 16MB (2 Meg x 72) and 32MB (4 Meg x 72) - Nonbuffered - High-performance CMOS silicon-gate process - Single +3.3V ±0.3V power supply - All inputs, outputs and clocks are TTL-patible - Refresh modes: RAS#-ONLY, CAS#-BEFORE-RAS# (CBR) and HIDDEN - 2,048-cycle refresh distributed across 32ms - FAST-PAGE-MODE (FPM) or Extended Data-Out (EDO) PAGE MODE access cycles - Serial presence-detect (SPD) MT9LD272A(X), MT18LD472A(X) For the latest data sheet revisions, please refer to the Micron Web site: .micron./mti/msp/html/datasheet.html PIN ASSIGNMENT (Front View) 168-Pin DIMM OPTIONS - Package 168-pin DIMM (gold) - Timing 50ns access 60ns access - Access Cycles FAST PAGE MODE EDO PAGE MODE - EDO version only MARKING G -5- -6 None X KEY TIMING PARAMETERS EDO Operating Mode SPEED -5 -6 t RC t RAC t PC t AA t CAC t CAS 84ns 104ns 50ns 60ns 20ns 25ns 25ns 30ns 13ns 15ns 8ns 10ns FPM Operating Mode SPEED -6 t RC t RAC t PC t AA t CAC t RP 110ns 60ns 35ns 30ns 15ns 40ns NOTE: Pin symbols in parentheses are not used on these modules but may be used for other modules in this product family. They are for reference only. PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41...