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MT18LD272A - (MT18LD272A / MT18LD472A) NONBUFFERED DRAM DIMMs

Download the MT18LD272A datasheet PDF (MT18LD472A included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for (mt18ld272a / mt18ld472a) nonbuffered dram dimms.

Description

The MT9LD272A(X) and MT18LD472A(X) are randomly accessed 16MB and 32MB memories organized in a x72 configuration.

They are specially processed to operate from 3V to 3.6V for low-voltage memory systems.

Features

  • JEDEC-standard, eight-CAS#, ECC pinout in a 168-pin, dual in-line memory module (DIMM).
  • 16MB (2 Meg x 72) and 32MB (4 Meg x 72).
  • Nonbuffered.
  • High-performance CMOS silicon-gate process.
  • Single +3.3V ±0.3V power supply.
  • All inputs, outputs and clocks are TTL-compatible.
  • Refresh modes: RAS#-ONLY, CAS#-BEFORE-RAS# (CBR) and HIDDEN.
  • 2,048-cycle refresh distributed across 32ms.
  • FAST-PAGE-MODE (FPM) or Extended Data-Out.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MT18LD472A_MicronTechnology.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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www.DataSheet4U.com OBSOLETE 2, 4 MEG x 72 NONBUFFERED DRAM DIMMs DRAM MODULE FEATURES • JEDEC-standard, eight-CAS#, ECC pinout in a 168-pin, dual in-line memory module (DIMM) • 16MB (2 Meg x 72) and 32MB (4 Meg x 72) • Nonbuffered • High-performance CMOS silicon-gate process • Single +3.3V ±0.3V power supply • All inputs, outputs and clocks are TTL-compatible • Refresh modes: RAS#-ONLY, CAS#-BEFORE-RAS# (CBR) and HIDDEN • 2,048-cycle refresh distributed across 32ms • FAST-PAGE-MODE (FPM) or Extended Data-Out (EDO) PAGE MODE access cycles • Serial presence-detect (SPD) MT9LD272A(X), MT18LD472A(X) For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.
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