MT28C3224P18 Overview
ADVANCE‡ 2 MEG x 16 PAGE FLASH 256K x 16 SRAM BO MEMORY FLASH AND SRAM BO MEMORY.
MT28C3224P18 Key Features
- Flexible dual-bank architecture
- Support for true concurrent operations with no latency: Read bank b during program bank a and vice versa Read bank b dur
- Organization: 2,048K x 16 (Flash) 256K x 16 (SRAM)
- Basic configuration: Flash Bank a (8Mb Flash for data storage)
- Eight 4K-word parameter blocks
- Fifteen 32K-word blocks Bank b (24Mb Flash for program storage)
- Forty-eight 32K-word main blocks SRAM 4Mb SRAM for data storage
- 256K-words
- Asynchronous access time Flash access time: 80ns @ 1.80V F_VCC SRAM access time: 85ns @ 1.80V S_VCC
- Page Mode read access Interpage read access: 80ns @ 1.80V F_VCC Intrapage read access: 30ns @ 1.80V F_VCC