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MT28C3224P18 - FLASH AND SRAM COMBO MEMORY

General Description

The MT28C3224P20 and MT28C3224P18 combination Flash and SRAM memory devices provide a compact, low-power solution for systems where PCB real estate is at a premium.

Key Features

  • Flexible dual-bank architecture.
  • Support for true concurrent operations with no latency: Read bank b during program bank a and vice versa Read bank b during erase bank a and vice versa.
  • Organization: 2,048K x 16 (Flash) 256K x 16 (SRAM).
  • Basic configuration: Flash Bank a (8Mb Flash for data storage).
  • Eight 4K-word parameter blocks.
  • Fifteen 32K-word blocks Bank b (24Mb Flash for program storage).
  • Forty-eight 32K-word main blocks SRAM.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ADVANCE‡ 2 MEG x 16 PAGE FLASH 256K x 16 SRAM COMBO MEMORY FLASH AND SRAM COMBO MEMORY FEATURES • Flexible dual-bank architecture • Support for true concurrent operations with no latency: Read bank b during program bank a and vice versa Read bank b during erase bank a and vice versa • Organization: 2,048K x 16 (Flash) 256K x 16 (SRAM) • Basic configuration: Flash Bank a (8Mb Flash for data storage) – Eight 4K-word parameter blocks – Fifteen 32K-word blocks Bank b (24Mb Flash for program storage) – Forty-eight 32K-word main blocks SRAM 4Mb SRAM for data storage – 256K-words • F_VCC, VCCQ, F_VPP, S_VCC voltages MT28C3224P20 1.80V (MIN)/2.20V (MAX) F_VCC read voltage 1.80V (MIN)/2.20V (MAX) S_VCC read voltage 1.80V (MIN)/2.20V (MAX) VCCQ MT28C3224P18 1.70V (MIN)/1.