MT28C6428P20
Description
The MT28C6428P20 and MT28C6428P18 bination Flash and SRAM memory devices provide a pact, low-power solution for systems where PCB real estate is at a premium.
Key Features
- Flexible dual-bank architecture
- Asynchronous access time Flash access time: 80ns @ 1.80V F_VCC SRAM access time: 80ns @ 1.80V S_VCC
- Page Mode read access Interpage read access: 80ns @ 1.80V F_VCC Intrapage read access: 30ns @ 1.80V F_VCC
- Low power consumption
- Read/Write SRAM during program/erase of Flash
- Dual 64-bit chip protection registers for security purposes
- PROGRAM/ERASE cycles 100,000 WRITE/ERASE cycles per block
- Timing 80ns 85ns
- Boot Block Configuration Top Bottom
- Operating Voltage Range F_VCC = 1.70V–1.90V F_VCC = 1.80V–2.20V
