MT46H16M32LG Overview
x16, x32 Mobile LPDDR SDRAM.
MT46H16M32LG Key Features
- 8 Meg x 16 x 4 banks MT46H16M32LF
- 4 Meg x 32 x 4 banks MT46H16M32LG
- 4 Meg x 32 x 4 banks Features
- VDD/VDDQ = 1.70-1.95V
- Bidirectional data strobe per byte of data (DQS)
- Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle
- Differential clock inputs (CK and CK#)
- mands entered on each positive CK edge
- DQS edge-aligned with data for READs; centeraligned with data for WRITEs
- 4 internal banks for concurrent operation