MT46H8M32LF Description
.. Preview‡ 256Mb: 16 Meg x 16, 8 Meg x 32 Mobile DDR SDRAM Mobile Double Data Rate (DDR) SDRAM MT46H16M16LF 4 Meg x 16 x 4 Banks MT46H8M32LF 2 Meg x 32 x 4 Banks For a plete data sheet, please refer to.
MT46H8M32LF Key Features
- VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V
- Bidirectional data strobe per byte of data (DQS)
- Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle
- Differential clock inputs (CK and CK#)
- mands entered on each positive CK edge
- DQS edge-aligned with data for READs; centeraligned with data for WRITEs
- Four internal banks for concurrent operation
- Data masks (DM) for masking write data-one mask per byte
- Programmable burst lengths: 2, 4, 8, 16 or full page
- Concurrent auto precharge option is supported