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MT48H32M32LF - Mobile LPSDR SDRAM

General Description

6 Functional Block Diagram 7 Ball Assignments and Descriptions 8 Package Dimensions 10 Electrical Specifications 11 Absolute Maximum Ratings 11 Electrical Specifications IDD Parameters 13 Electrical Specifications AC Operating Conditions 16 Output Drive Characteristics 1

Key Features

  • Mobile LPSDR SDRAM MT48H32M32LF/LG.
  • 8 Meg x 32 x 4 Banks Features.
  • VDD/VDDQ = 1.7.
  • 1.95V.
  • Fully synchronous; all signals registered on positive edge of system clock.
  • Internal, pipelined operation; column address can be changed every clock cycle.
  • Four internal banks for concurrent operation.
  • Programmable burst lengths: 1, 2, 4, 8, and continuous.
  • Auto precharge, includes concurrent auto precharge.
  • Auto refresh and sel.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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1Gb: x32 Mobile LPSDR SDRAM Features Mobile LPSDR SDRAM MT48H32M32LF/LG – 8 Meg x 32 x 4 Banks Features • VDD/VDDQ = 1.7–1.95V • Fully synchronous; all signals registered on positive edge of system clock • Internal, pipelined operation; column address can be changed every clock cycle • Four internal banks for concurrent operation • Programmable burst lengths: 1, 2, 4, 8, and continuous • Auto precharge, includes concurrent auto precharge • Auto refresh and self refresh modes • LVTTL-compatible inputs and outputs • On-chip temperature sensor to control self refresh rate • Partial-array self refresh (PASR) • Deep power-down (DPD) • 64ms refresh period Table 1: Configuration Addressing Architecture Number of banks Bank address balls Row address balls Column address balls Note: 1.