MT48LC64M8A2
Description
The 512Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits.
Key Features
- PC100- and PC133-pliant
- Fully synchronous; all signals registered on positive edge of system clock
- Internal pipelined operation; column address can be changed every clock cycle
- Internal banks for hiding row access/precharge
- Programmable burst lengths: 1, 2, 4, 8, or full page
- Auto Precharge, includes CONCURRENT AUTO PRECHARGE, and Auto Refresh Modes
- Self Refresh Mode
- 64ms, 8,192-cycle refresh
- Single +3.3V ±0.3V power supply
- Configurations 128 Meg x 4 (32 Meg x 4 x 4 banks) 64 Meg x 8 (16 Meg x 8 x 4 banks) 32 Meg x 16 (8 Meg x 16 x 4 banks)
