Download MT48V8M16LFFF Datasheet PDF
MT48V8M16LFFF page 2
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MT48V8M16LFFF page 3
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MT48V8M16LFFF Key Features

  • Temperature pensated Self Refresh (TCSR)
  • Fully synchronous; all signals registered on positive edge of system clock
  • Internal pipelined operation; column address can be changed every clock cycle
  • Internal banks for hiding row access/precharge
  • Programmable burst lengths: 1, 2, 4, 8, or full page
  • Auto Precharge, includes CONCURRENT auto precharge, and Auto Refresh Modes
  • Self Refresh Mode; standard and low power
  • 64ms, 4,096-cycle refresh
  • LVTTL-patible inputs and outputs
  • Low voltage power supply

MT48V8M16LFFF Description

x16, x32 MOBILE SDRAM SYNCHRONOUS DRAM.