MT4C16270 Description
The MT4C16270 is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x16 configuration. The MT4C16270 has both BYTE WRITE and WORD WRITE access cycles via two CAS# pins. The MT4C16270 CAS# function and timing are determined by the first CAS# (CASL# or CASH#) to transition LOW and by the last to transition back HIGH.
MT4C16270 Key Features
- Industry-standard x16 pinouts, timing, functions and packages
- High-performance CMOS silicon-gate process
- Single +5V ±10% power supply
- Low power, 3mW standby; 300mW active, typical
- All device pins are TTL-patible
- 512-cycle refresh in 8ms (9 row- and 9 column addresses)
- Refresh modes: RAS#-ONLY, CAS#-BEFORE-RAS# (CBR) and HIDDEN
- Extended Data-Out (EDO) PAGE MODE access cycle
- BYTE WRITE and BYTE READ access cycles
- Timing 40ns access 50ns access 60ns access