Description
The MT9LSDT872 and MT9LSDT1672 are high-speed CMOS, dynamic random-access, 64MB and 128MB memories organized in a x72 configuration.
These modules use internally configured quad-bank SDRAMs with a synchronous interface (all signals are registered on the positive edge of clock signals CK0).
Features
- JEDEC-standard 168-pin, dual in-line memory module (DIMM).
- PC133- and PC100-compliant.
- Registered inputs with one-clock delay.
- Phase-lock loop (PLL) clock driver to reduce loading.
- Utilizes 133 MHz and 125 MHz SDRAM components.
- ECC-optimized pinout.
- 64MB (8 Meg x 72) and 128MB (16 Meg x 72).
- Single +3.3V ±0.3V power supply.
- Fully synchronous; all signals registered on positive edge of PLL clock.
- Internal p.
MT9LSDT872 Datasheet
