MT4HTF6464AY
Key Features
- 240-pin, unbuffered dual in-line memory module (UDIMM)
- VDD = VDDQ = 1.8V
- VDDSPD = 1.7–3.6V
- Differential data strobe (DQS, DQS#) option
- 4n-bit prefetch architecture
- Multiple internal device banks for concurrent
- Programmable CAS latency (CL)
- Posted CAS additive latency (AL)
- WRITE latency = READ latency - 1 tCK
- Adjustable data-output drive strength
