MT5LC2564 Description
The MT5LC2564 is organized as a 65,536 x 4 SRAM.
MT5LC2564 Key Features
- All I/O pins are 5V tolerant
- High speed: 12, 15, 20, 25 and 35ns
- High-performance, low-power, CMOS double-metal
- Single +3.3V ±O.3V power supply
- Easy memory expansion with CE option
- All inputs and outputs are TTL-patible
- plies to JEOEC low-voltage TTL standards
- Timing 12ns access 15ns access 20ns access 25ns access 35ns access
- 12 -15 -20 -25 -35
- Packages Plastic DIP (300 mil)