MSP3401G Datasheet | Micronas Semiconductor

Features of the MSP 34x1G Family and Differences to MSP 34xx D MSP 34x1G Version List MSP 34x1G Versions and their Application Fields Functional Description Architecture of the MSP 34x1G Family Sound IF Processing Analog Sound IF Input Demodulator: Standards and Features Preprocessing of Demodulator Signals Automatic Sound Select Preprocessing for SCART and I2S Input Signals Source Selection and Output Channel Matrix Audio Baseband Processing Automatic Volume Correction (AVC) Loudspeaker and Headphone Outputs Subwoofer Output Quasi-Peak Detector Virtual Surround System Application Tips Sweet Spot Clipping Loudspeaker Requirements Cabinet Requirements SCART Signal Routing SCART DSP In and SCART Out Select Stand-by Mode I2S Bus Interface ADR Bus Interface Digital Control I/O Pins and Status Change Indication Clock PLL Oscillator and Crystal Specifications Control Interface I2C Bus Interface Device and Subaddresses Description of CONTROL Register Protocol Description Proposals for General MSP 34x1G I2C Telegrams Symbols Write Telegrams Read Telegrams Examples Start-Up Sequence: Power-Up and I2C Controlling MSP 34x1G Programming Interface User Registers Overview Description of User Registers STANDARD SELECT Register ww.. .. 2 MICRONAS INTERMETALL . .. 4U. Data Sheet 4 U . .. .. PRELIMINARY DATA SHEET MSP 34x1G Contents, continued Page 26 27 28 29 30 43 44 44 44 44 44 45 45 45 45 45 45 47 47 49 52 55 59 61 61 62 62 62 63 64 65 65 66 67 68 69 70 72 72 73 76 Section 3.3.2.2. 3.3.2.3. 3.3.2.4. 3.3.2.5. 3.3.2.6. 3.3.2.7. 3.4. 3.5. 3.5.1. 3.5.2. 3.5.3. 3.5.4. 3.5.5. 3.5.6. 3.5.7. 3.5.8. 3.5.9. 4. 4.1. 4.2. 4.3. 4.4. 4.5. 4.6. 4.6.1. 4.6.2. 4.6.2.1. 4.6.2.2. 4.6.2.3. 4.6.2.4. 4.6.3. 4.6.3.1. 4.6.3.2. 4.6.3.3. 4.6.3.4. 4.6.3.5. 4.6.3.6. 4.6.3.7. 4.6.3.8. 4.6.3.9. 4.6.3.10. Title Refresh of STANDARD SELECT Register STANDARD RESULT Register Write Registers on I2C Subaddress 10hex Read Registers on I2C Subaddress 11hex Write Registers on I2C Subaddress 12hex Read Registers...