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A3PN250 - ProASIC3 nano Flash FPGAs

Download the A3PN250 datasheet PDF. This datasheet also covers the A3PN010 variant, as both devices belong to the same proasic3 nano flash fpgas family and are provided as variant models within a single manufacturer datasheet.

Description

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Features

  • Wide Range of Features.
  • 10 k to 250 k System Gates.
  • Up to 36 kbits of True Dual-Port SRAM.
  • Up to 71 User I/Os Advanced I/Os.
  • 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation.
  • Bank-Selectable I/O Voltages.
  • up to 4 Banks per Chip.
  • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V.
  • Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7 V to 3.6 V.
  • I/O Registers.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (A3PN010-MicrosemiCorporation.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
A3P015 ProASIC3 Flash Family FPGAs Microsemi
A3P030 ProASIC3 Flash Family FPGAs Microsemi
A3P030 (A3Pxxx) ProASIC3 Flash Family FPGAs Actel Corporation
A3P060 ProASIC3 Flash Family FPGAs Microsemi
A3P060 (A3Pxxx) ProASIC3 Flash Family FPGAs Actel Corporation

Other Datasheets by Microsemi (Microchip)

Part Number Description
A3PN010 ProASIC3 nano Flash FPGAs
A3PN015 ProASIC3 nano Flash FPGAs
A3PN020 ProASIC3 nano Flash FPGAs
A3PN030Z ProASIC3 nano Flash FPGAs
A3PN060 ProASIC3 nano Flash FPGAs

Full PDF Text Transcription

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Revision 11 ProASIC3 nano Flash FPGAs Features and Benefits Wide Range of Features • 10 k to 250 k System Gates • Up to 36 kbits of True Dual-Port SRAM • Up to 71 User I/Os Advanced I/Os • 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V • Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7 V to 3.6 V • I/O Registers on Input, Output, and Enable Paths • Selectable Schmitt Trigger Inputs • Hot-Swappable and Cold-Sparing I/Os • Programmable Output Slew Rate† and Drive Strength • Weak Pull-Up/-Down • IEEE 1149.
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