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MAX3674 - Network Clock Synthesizer

General Description

The MAX3674 is a high-performance network clock synthesizer IC for networking, computing, and telecom applications.

It integrates a crystal oscillator, a lownoise phase-locked loop (PLL), programmable dividers, and high-frequency LVPECL output buffers.

Key Features

  • 21.25MHz to 1360MHz Programmable PLL Synthesized Output Clocks.
  • Two Differential LVPECL-Compatible Outputs.
  • Cycle-to-Cycle Jitter 1.6ps RMS and Period Jitter 0.9ps RMS at 500MHz.
  • On-Chip Crystal Oscillator or Selectable LVCMOS-Compatible Reference Clock Input.
  • Excellent Power-Supply Noise Rejection.
  • Parallel or 2-Wire I2C Programming Interface.
  • Lock Indicator Output.
  • +3.3V Power Supply.
  • Power Consumption: 396mW at.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MAX3674 19-2483; Rev 0; 12/07 EVALUATION KIT AVAILABLE High-Performance, Dual-Output, Network Clock Synthesizer General Description The MAX3674 is a high-performance network clock synthesizer IC for networking, computing, and telecom applications. It integrates a crystal oscillator, a lownoise phase-locked loop (PLL), programmable dividers, and high-frequency LVPECL output buffers. The PLL generates a high-frequency clock based on a low-frequency reference clock provided by the on-chip crystal oscillator or an external LVCMOS clock. The MAX3674 has excellent period jitter, cycle-to-cycle jitter, and supply noise rejection performance. With output frequencies programmable from 21.