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ZL30623 - Dual-Channel Any Frequency Timing Card PLL

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Overview

Register Map: Section 6.2.

Key Features

  • Two Independent Channels.
  • Low-Bandwidth DPLL Per Channel.
  • ITU-T G.813/G.8262 compliance (options 1 & 2).
  • Programmable bandwidth, 0.1Hz to 500Hz.
  • Attenuates jitter up to several UI.
  • Freerun or holdover on loss of all inputs.
  • Hitless reference switching.
  • High-resolution holdover averaging.
  • Digitally controlled phase adjustment.
  • Three Input Clocks Per Channel.
  • Three inputs, two differential/CMOS, one.

More Datasheets from Microsemi (now Microchip Technology)

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