Microsemi ZL30773
IEEE 1588 & Synchronous Ethernet Packet Clock Network Synchronizers
FEATURES
● One, Two or Three DPLL Channels● Packet and/or physical-layer frequency, phase and time synchronization
● Physical-layer compliance with ITU-T G.8262, G.8261.1, G.813, G.812, Telcordia GR-1244, GR-253
● Packet-timing compliance with ITU-T G.8261, G.8263, G.8273.2 (class A, B, C, D), G.8273.4
● Enables 5G wireless applications with sub100ns time/phase alignment requirements
● Programmable bandwidth, 0.1mHz to 470Hz
● Hitless reference switching and mode switching
● High-resolution holdover averaging
● Programmable phase slope limit for transients, downto 1 ns/s
● Per-DPLL phase adjustment, 1ps resolution
● Input Clocks
● Accepts up to 10 differential or CMOS inputs
● Any input frequency from 0.5Hz to 900MHz
● Per-input activity and frequency monitoring
● Automatic or manual reference switching
● Fast lock to 1 PPS input, <30 seconds
● Any input can be a 1PPS SYNC input for REF+SYNC frequency/phase/time locking
● Per-input phase adjustment, 1ps resolution
● Output Clock Frequ...