CX28985 Datasheet | Mindspeed Technologies

Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. CX28985 Octal Zip Wire Multi G.shdsl Transceiver with Embedded Microprocessor Multi-Mode Operation: G.shdsl+, HDSL2, SDSL, HDSL, and IDSL Distinguishing Features - Multimode operation including: The Zip Wire Multi DSL solution goes beyond simple pliance with the ITU G.shdsl - ITU G.shdsl including EPAP standard by supporting the optional Enhanced Performance Asymmetrical PSD (EPAP) modes (ITU G.991.2) modes of operation. In addition, it is pliant with the ANSI HDSL2 standard (ANSI - ITU G.handshake (ITU G.994.1) T1.418) and provides interoperability with Conexant’s market-leading Zip Wire - HDSL2 (ANSI T1.418) transceivers through operation in 2B1Q multi-rate mode. The 2B1Q mode includes - SDSL/2B1Q (Auto Baud) support of Auto Baud for SDSL interoperability, rate optimization, fast connect times, - HDSL (ITU G.991.1, ETS 101 135 and ANSI TR-28) and standards-based HDSL operation. Furthermore, it operates in IDSL mode for - IDSL (ANSI T1.601) interoperability with Basic Rate ISDN repeaters. The Zip Wire Multi also supports - Proprietary/Extended Reach Conexant’s own proprietary modes, such as 32-PAM, 64 kbps, and 3.088 Mbps (ANSI spectrum management for operation, which provide enhanced spectral patibility, extended subscriber line loop transmission systems) reach, and high-speed operation. All these modes are supported by a single hardware - Proprietary/high-speed (ANSI circuit (i.e., one transformer, crystal, and hybrid for all modes) and can be configured in spectrum management for loop realtime via software control. (Continued) transmission systems) - Functional Block Diagram - .. Host Bus Interface Host Port RAM Internal RAM Boot ROM RAM Controller Expansion Bus SDRAM SRAM PROM - Serial PCM Serial Data PCM Serial Data PCM Serial Data ATM Transmission...