Datasheet Summary
3V Large Digital Switch
Features
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- - 2,048 × 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay Automatic identification of ST-BUS/GCI interfaces Accept ST-BUS streams of 2.048, 4.096 or 8.192 Mb/s Automatic frame offset delay measurement Per-stream frame delay offset programming Per-channel high impedance output control Per-channel message mode Control interface patible to Motorola non-multiplexed CPUs Connection memory block programming 3.3V local I/O with 5V tolerant inputs and TTL-patible outputs IEEE-1149.1 (JTAG) Test Port
DS5064 ISSUE 3 January 2000
Ordering Information MT90823AP 84 Pin PLCC...