M37221EF-xxxSP Overview
The M37221EF-XXXSP and M37221EFSP are single-chip microputers designed with CMOS silicon gate technology. They are housed in a 42-pin shrink plastic molded DIP. In addition to their simple instruction sets, the ROM, RAM and I/O addresses are placed on the same memory map to enable easy programming.
M37221EF-xxxSP Key Features
- Number of basic instructions
- Memory size
- 62 K bytes RAM
- 1216 bytes ROM for display
- 8 K bytes RAM for display
- 96 bytes The minimum instruction execution time
- 0.5 µs (at 8 MHz oscillation frequency) Power source voltage
- 5 V ± 10 % Power dissipation
- 165 mW (at 8 MHz oscillation frequency, VCC =5.5V, at CRT display) Subroutine nesting
- 96 levels (maximum) Interrupts
