Description
The M16C/62N group of single-chip microcomputers are built using the high-performance silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP.
Features
- Memory capacity ROM (See Figure 1.1.4. ROM Expansion) RAM 10K to 20K bytes.
- Shortest instruction execution time 62.5ns (f(XIN)=16MHZ, VCC=3.0V to 3.6V) 142.9ns (f(XIN)=7MHZ, VCC=2.4V to 3.6V without software wait).
- Supply voltage 3.0V to 3.6V (f(XIN)=16MHZ, without software wait) 2.4V to 3.0V (f(XIN)=7MHZ, without software wait) 2.2V to 3.0V (f(XIN)=7MHZ, with software one-wait) :mask ROM version.
- Low power consumption 34.0mW (VCC = 3V, f(XIN)=10MHZ, with.
M30620MCN Datasheet
