• Part: M2V64S40BTP
  • Description: 64M bit Synchronous DRAM
  • Manufacturer: Mitsubishi Electric
  • Size: 674.37 KB
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Mitsubishi Electric
M2V64S40BTP
M2V64S40BTP is 64M bit Synchronous DRAM manufactured by Mitsubishi Electric.
DESCRIPTION The M2V64S20BTP is organized as 4-bank x 4194304-word x 4-bit, M2V64S30BTP is organized as 4-bank x 2097152-word x 8-bit, and M2V64S40BTP is organized as 4-bank x 1048576-word x 16-bit Synchronous DRAM with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. The M2V64S20BTP, M2V64S30BTP, M2V64S40BTP achieve very high speed data rate up to 125MHz, and are suitable for main memory or graphic memory in puter systems. Features - Single 3.3v ± 0.3v power supply - Clock frequency 125MHz /100MHz - Fully synchronous operation referenced to clock rising edge - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/Full Page (programmable) - Burst type- sequential / interleave (programmable) - Column access - random - Burst Write / Single Write (programmable) - Auto precharge / All bank precharge controlled by A10 - Auto refresh and Self refresh - 4096 refresh cycles /64ms - Column address A0-A9 (x4), A0-A8(x8), A0-A7(x16) - LVTTL Interface - 400-mil, 54-pin Thin Small Outline Package (TSOP II) with 0.8mm lead pitch Max. Frequency -7, -7L M2V64S20BTP M2V64S30BTP M2V64S40BTP -8, -8L -8A -10, -10L 100MHz(CL2) 100MHz(CL3) 125MHz 100MHz CLK Access Time 6ns 6ns 6ns 8ns MITSUBISHI ELECTRIC 1 SDRAM (Rev.1.2) Apr. '99 64M bit Synchronous DRAM MITSUBISHI LSIs M2V64S20BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 4194304-WORD x 4-BIT) M2V64S30BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 2097152-WORD x 8-BIT) M2V64S40BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 1048576-WORD x 16-BIT) PIN CONFIGURATION (TOP VIEW) M2V64S20BTP M2V64S30BTP M2V64S40BTP Vdd NC Vdd Q NC DQ0 Vss Q NC NC Vdd Q NC DQ1 Vss Q NC Vdd NC /WE /CAS /RAS /CS BA0(A13) BA1(A12) A10 A0 A1 A2 A3 Vdd Vdd DQ0 Vdd Q NC DQ1 Vss Q NC DQ2 Vdd Q NC DQ3 Vss Q NC Vdd NC /WE /CAS /RAS /CS BA0(A13) BA1(A12) A10 A0 A1 A2 A3 Vdd Vdd DQ0 Vdd Q DQ1 DQ2 Vss Q DQ3 DQ4 Vdd Q DQ5 DQ6 Vss Q DQ7 Vdd DQML /WE /CAS /RAS /CS BA0(A13) BA1(A12) A10 A0 A1 A2 A3 Vdd 1 2 3...