M30620SAFP Overview
SINGLE-CHIP 16-BIT CMOS MICROPUTER Description The M16C/62A group of single-chip microputers are built using the high-performance silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP. These single-chip microputers operate using sophisticated instructions featuring a high level of instruction efficiency. With 1M bytes of address space, they are capable of...
M30620SAFP Key Features
- Memory capacity
- ROM (See Figure 1.1.4. ROM Expansion) RAM 3K to 20K bytes
- Shortest instruction execution time
- 62.5ns (f(XIN)=16MHZ, VCC=5V) 100ns (f(XIN)=10MHZ, VCC=3V, with software one-wait) : Mask ROM, flash memory 5V version
- Supply voltage
- 4.2V to 5.5V (f(XIN)=16MHZ, without software wait) : Mask ROM, flash memory 5V version 2.7V to 5.5V (f(XIN)=10MHZ with s
- Low power consumption
- 25.5mW ( f(XIN)=10MHZ, with software one-wait, VCC = 3V)
- Interrupts
- 25 internal and 8 external interrupt sources, 4 software interrupt sources; 7 levels (including key input interrupt)
M30620SAFP Applications
- Memory capacity .................................. ROM (See Figure 1.1.4. ROM Expansion) RAM 3K to 20K bytes
- Shortest instruction execution time ...... 62.5ns (f(XIN)=16MHZ, VCC=5V) 100ns (f(XIN)=10MHZ, VCC=3V, with software one-wait) : Mask ROM, flash memory 5V versio
- Supply voltage ..................................... 4.2V to 5.5V (f(XIN)=16MHZ, without software wait) : Mask ROM, flash memory 5V version 2.7V to 5.5V (f(XIN)
- Low power consumption ...................... 25.5mW ( f(XIN)=10MHZ, with software one-wait, VCC = 3V)
