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M32000D3FP - SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER

General Description

The M32000D3FP is a new generation microcomputer with a 32-bit CPU and built-in high capacity DRAM.

Using this device it is possible to implement the complex applications of the multimedia age with high performance and low power consumption.

Key Features

  • CPU M32R family CPU core.
  • Pipeline 5 steps.
  • Basic bus cycle 15 ns (at internal 66.6 MHz).
  • Logical address space 4G-byte linear.
  • External bus data bus: 16 bits address bus: 24 bits.
  • Internal DRAM 8M bits (1M bytes).
  • Cache 4K bytes (direct map).
  • Register configuration general-purpose registers: 32 bits x 16 control registers: 32 bits x 5.
  • Instruction set 83 instructions/6 addressing modes.
  • Inst.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MITSUBISHI MICROCOMPUTERS M32000D3FP SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER DESCRIPTION The M32000D3FP is a new generation microcomputer with a 32-bit CPU and built-in high capacity DRAM. Using this device it is possible to implement the complex applications of the multimedia age with high performance and low power consumption. The M32000D3FP contains 1M bytes of DRAM and 4K bytes of cache memory. The CPU is implemented with a RISC architecture and has a high performance figure of 52.4 MIPS (at an internal clock rate of 66.6 MHz ). Memory for main storage is provided internally to the device eliminating external memory and associated control circuits thus reducing overall system noise and power consumption.