M5M417400CTP-5 Datasheet PDF (FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM)

M5M417400CTP-5 - FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM

This page provides the datasheet information for the M5M417400CTP-5, a member of the M5M FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM family.

Description

This is a family of 4194304-word by 4-bit dynamic RAMS, fabricated with the high performance CMOS process, and is ideal for large-capacity memory systems where high speed, low power dissipation, and low costs are essential.

Features

RAS CAS access time (max. ns) Address access time (max. ns) OE access time (max. ns) Cycle time (min. ns) Power dissipation (typ. mW) Type Name access time (max. ns) M5M417400CXX-5,-5S M5M417400CXX-6,-6S M5M417400CXX-7,-7S 50 60 70 13 15 20 25 30 35 13 15 20 90 110 130 655 540 475 XX=J, TP.
Standard 26 pin SOJ, 26 pin TSOP.
Single 5V ± 10% supply.
Low stand-by power dissipation 5.5mW(Max) CMOS Input level 2.2mW (Max).
CMOS Input level.
Low operating p.

Datasheet Details

Part number	M5M417400CTP-5
Manufacturer	Mitsubishi
File Size	657.52 KB
Description	FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM
Datasheet	M5M417400CTP-5 Datasheet
Additional preview pages of the M5M417400CTP-5 datasheet.

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Full PDF Text Transcription

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MITSUBISHI LSIs M5M417400CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM DESCRIPTION This is a family of 4194304-word by 4-bit dynamic RAMS, fabricated with the high performance CMOS process, and is ideal for large-capacity memory systems where high speed, low power dissipation, and low costs are essential. The use of double-layer metal process combined with twin-well CMOS technology and a single-transistor dynamic storage stacked capacitor cell provide high circuit density at reduced costs. Multiplexed address inputs permit both a reduction in pins and an increase in system densities.

Published: Apr 26, 2005 |