Datasheet4U Logo Datasheet4U.com

M5M4V4405CJ-6 - EDO (HYPER PAGE MODE) 4M-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM

This page provides the datasheet information for the M5M4V4405CJ-6, a member of the M5M4V4405CJ EDO (HYPER PAGE MODE) 4M-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM family.

Description

This is a family of 1048576-word by 4-bit dynamic RAMS, fabricated with the high performance CMOS process,and is ideal for large-capacity memory systems where high speed, low power dissipation , and low costs are essential.

Features

  • Type name RAS CAS Address OE access access access access time time time time Cycle.

📥 Download Datasheet

Datasheet preview – M5M4V4405CJ-6

Datasheet Details

Part number M5M4V4405CJ-6
Manufacturer Mitsubishi
File Size 293.68 KB
Description EDO (HYPER PAGE MODE) 4M-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
Datasheet download datasheet M5M4V4405CJ-6 Datasheet
Additional preview pages of the M5M4V4405CJ-6 datasheet.
Other Datasheets by Mitsubishi

Full PDF Text Transcription

Click to expand full text
MITSMUIBTSISUHBI ISLHSIsLSIs M5M4V4405MC5JM,4TVP44-065,C-J7,T,-P6-6S,-7,,--76SS,-7S EDOE(DHOYP(HEYRPPEARGPEAMGOEDMEO) D41E9)44310944-3B0I4T-B(1I0T4(180547865-W76O-WRDORBDY B4-YB4IT-B) DITY)NDAYMNIACMRICAMRAM DESCRIPTION This is a family of 1048576-word by 4-bit dynamic RAMS, fabricated with the high performance CMOS process,and is ideal for large-capacity memory systems where high speed, low power dissipation , and low costs are essential. The use of quadruple-layer polysilicon process combined with silicide technology and a single-transistor dynamic storage stacked capacitor cell provide high circuit density at reduced costs. Multiplexed address inputs permit both a reduction in pins and an increase in system densities.
Published: |