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M5M564R16DTP-15 - 1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM

General Description

The M5M564R16D is a family of 65536-word by 16-bit static RAMs, fabricated with the high performance CMOS process and designed for high speed application.

These devices operate on a single 3.3V supply, and are directly TTL compatible.

They include a power down feature as well.

Key Features

  • Fast access time M5M564R16DJ,TP-10 10ns(max) M5M564R16DJ,TP-12 12ns(max) M5M564R16DJ,TP-15 15ns(max).
  • Low power dissipation Active 363mW(typ).
  • Single +3.3V power supply.
  • Fully static operation : No clocks, No refresh.
  • Common data I/O.
  • Easy memory expansion by S.
  • Three-state outputs : OR-tie capability.
  • OE prevents data contention in the I/O bus.
  • Directly TTL compatible : All inputs and outputs.
  • Separate control.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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1998.6.18 Ver.A MITSUBISHI LSIs PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. M5M564R16DJ,TP-10,-12,-15 1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM DESCRIPTION The M5M564R16D is a family of 65536-word by 16-bit static RAMs, fabricated with the high performance CMOS process and designed for high speed application. These devices operate on a single 3.3V supply, and are directly TTL compatible. They include a power down feature as well. In write and read cycles, the lower and upper bytes are able to be controled either togethe or separately by LB and UB. ADDRESS INPUTS CHIP SELECT INPUTS DATA INPUTS/ OUTPUTS PIN CONFIGURATION (TOP VIEW) FEATURES •Fast access time M5M564R16DJ,TP-10 ... 10ns(max) M5M564R16DJ,TP-12 ...