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M5M5V208AKV - 2097152-BIT (262144-WORD BY 8-BIT) CMOS STATIC RAM

General Description

The M5M5V208A is a family of low voltage 2-Mbit static RAMs organized as 262,144-words by 8-bit, fabricated by Mitsubishi's highperformance 0.25µm CMOS technology.

Key Features

  • Single 2.7 ~ 3.6V power supply.
  • No clocks, No refresh.
  • All inputs and outputs are TTL compatible.
  • Easy memory expansion and power down by S1 & S2.
  • Data retention supply voltage=2.0V.
  • Three-state outputs: OR-tie capability.
  • OE prevents data contention in the I/O bus.
  • Common Data I/O.
  • Battery backup capability.
  • Small stand-by current.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Revision-A0.2E 29.Jan.'99 MITSUBISHI LSIs M5M5V208AKV/KR PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change 2097152-BIT (262144-WORD BY 8-BIT) CMOS STATIC RAM DESCRIPTION The M5M5V208A is a family of low voltage 2-Mbit static RAMs organized as 262,144-words by 8-bit, fabricated by Mitsubishi's highperformance 0.25µm CMOS technology. The M5M5V208A is suitable for memory applications where a simple interfacing , battery operating and battery backup are the important design objectives. The M5M5V208A is packaged in 32-pin 8mm x 13.4mm STSOP packages. Two types of STSOPs are available, M5M5V208AKV (normal-lead-bend STSOP) and M5M5V208AKR (reverse-lead-bend STSOP).