M66010GP
Key Features
- Two-way serial data communication with MCU
- Serial data intake possible during parallel-to-serial conversion
- Parallel input/output switchable according to the bit
- Low power dissipation: 100µW maximum per package (VCC =5V, Ta = 25˚C, quiescent)
- Schmidt input (DI, CLK, S, CS)
- Open drain output (DO, D1 thru D24)
- Parallel data input and output (D1 thru D24)
- Wide operating supply voltage range (VCC = 2V ~ 6V) APPLICATION MCU-related serial-parallel data conversion, serial bus control by MCU, etc. FUNCTION The M66010 is produced by using the silicon gate CMOS (complementary metal-oxide semiconductor) technology. It is distinguished for low power dissipation and high noise resistance. Because two independent shift registers are built in, one for serial-to-parallel, the other for parallel-to-serial, this IC is able to read serial input data into a shift register while converting parallel data into serial data. One cycle of latching 24-bit parallel data and outputing it in series while taking in serial data from MCU is initiated by CS’s shift from “H” to “L”. At CS fall edges, 24-bit parallel data is latched, and output in series from pin DO synchronously with shift clock fall edges. At shift clock rise edges, serial data is taken in from MCU via pin DI. The data is read into shift register. The 25th and following shift clock pulses are ignored and read-in operation is masked. The pin D0 status shifts to high-impedance. As CS is then shifted from “L” to “H”, 24-bit serial data taken in via pin DI is output in parallel to pins D1 thru D24. Because parallel output pins are the n-channel open drain output type, write data “H” for pins which should be set to input.
