V29C51001B Datasheet | Mosel Vitelic Corp

Description PRELIMINARY Features s s s s s s 128Kx8-bit Organization Address Access Time: 45, 70, 90 ns Single 5V ± 10% Power Supply Sector Erase Mode Operation 8KB Boot Block (lockable) 512 bytes per Sector, 256 Sectors - Sector-Erase Cycle Time: 10ms (Max) - Byte-Program Cycle Time: 20µs (Max) Minimum 10,000 Erase-Program Cycles Low power dissipation - Active Read Current: 20m A (Typ) - Active Program Current: 30m A (Typ) - Standby Current: 100µA (Max) Hardware Data Protection Low VCC Program Inhibit Below 2.5V Self-timed program/erase operations with endof-cycle detection - DATA Polling - Toggle Bit CMOS and TTL Interface Available in two versions - V29C51001T (Top Boot Block) - V29C51001B (Bottom Boot Block) Packages: - 32-pin Plastic DIP - 32-pin TSOP-I - 32-pin PLCC s s s s s s s The V29C51001T/V29C51001B is a high speed 131,072 x 8 bit CMOS flash memory. Programming or erasing the device is done with a single 5 Volt power supply. The device has separate chip enable CE, program enable WE, and output enable OE controls to eliminate bus contention. The V29C51001T/V29C51001B offers a bination of features : Boot Block with Sector Erase Mode. The end of program/erase cycle is detected by DATA Polling of I/O7 or by the Toggle Bit I/O6. The V29C51001T/V29C51001B features a sector erase operation which allows each sector to be erased and reprogrammed without affecting data stored in other sectors. The device also supports full chip erase. Boot block architecture enables the device to boot from a protected sector loaded either at the top (V29C51001T) or the bottom (V29C51001B) sector. All inputs and outputs are CMOS and TTL patible. The V29C51001T/V29C51001B is ideal for applications that require updatable code and data storage. s Device Usage Chart Operating Temperature Range 0°C to 70°C Package Outline P - T - J - 45 - Access Time (ns) 70 - 90 - Power Temperature Mark Blank Std. - V29C51001T/V29C51001B Rev. 0.8 October 2000 MOSEL VITELIC V 29 C 51 001 T -...