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V53C318165A - 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM

Description

The V53C318165A is a 1048576 x 16 bit highperformance CMOS dynamic random access memory.

The V53C318165A offers Page mode operation with Extended Data Output.

The V53C318165A has an symmetric address, 10-bit row and 10-bit column.

Features

  • s 1M x 16-bit organization s EDO Page Mode for a sustained data rate of 50 MHz s RAS access time: 50, 60, 70 ns s Dual CAS Inputs s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh, and Self Refresh. s Refresh Interval: 1024 cycles/16 ms s Available in 42-pin 400 mil SOJ and 50/44-pin 400 mil TSOP-II s Single +3.3 V ±0.3 V Power Supply s TTL Interface.

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Datasheet Details

Part number V53C318165A
Manufacturer Mosel Vitelic Corp
File Size 266.40 KB
Description 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM
Datasheet download datasheet V53C318165A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOSEL VITELIC V53C318165A 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Extended Data Out Page Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC) 50 50 ns 25 ns 20 ns 84 ns 60 60 ns 30 ns 25 ns 104 ns 70 70 ns 35 ns 30 ns 124 ns Features s 1M x 16-bit organization s EDO Page Mode for a sustained data rate of 50 MHz s RAS access time: 50, 60, 70 ns s Dual CAS Inputs s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh, and Self Refresh. s Refresh Interval: 1024 cycles/16 ms s Available in 42-pin 400 mil SOJ and 50/44-pin 400 mil TSOP-II s Single +3.3 V ±0.
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