V54C3256164VBUT Description
The V54C3256164VBUC/T is a low power four bank Synchronous DRAM organized as 4 banks x 4Mbit x 16. The V54C3256164VBUC/T achieves high speed data transfer rates up to 166 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock All of the control, address, data input and output circuits are synchronized with the positive edge of an externally supplied...
V54C3256164VBUT Key Features
- 4 banks x 4Mbit x 16 organization
- High speed data transfer rates up to 166 MHz
- Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge
- Single Pulsed RAS Interface
- Data Mask for Read/Write Control
- Four Banks controlled by BA0 & BA1
- Programmable CAS Latency: 2, 3
- Programmable Wrap Sequence: Sequential or Interleave
- Multiple Burst Read with Single Write Operation
- Automatic and Controlled Precharge mand