V54C3256804VS - 256Mbit SDRAM

This page provides the datasheet information for the V54C3256804VS, a member of the V54 256Mbit SDRAM family.

Product Overview

Mosel Vitelic Corp

Part number	V54C3256804VS
Manufacturer	Mosel Vitelic Corp
File Size	853.33 KB
Description	256Mbit SDRAM
Datasheet	V54C3256804VS Datasheet
Additional preview pages of the V54C3256804VS datasheet.

The V54C3256(16/80/40)4V(T/S/B) is a four bank Synchronous DRAM organized as 4 banks x 4Mbit x 16, 4 banks x 8Mbit x 8, or 4 banks x 16Mbit x 4.

4 banks x 4Mbit x 16 organization 4 banks x 8Mbit x 8 organization 4 banks x16Mbit x 4 organization High speed data transfer rates up to 166 MHz Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge Single Pulsed RAS Interface Data Mask for Read/Write Control Four Banks controlled by BA0 & BA1 Programmable CAS Latency: 2, 3 Programmable Wrap Sequence: Sequential or Interleave Programmable Burst Length: 1,.

Other Datasheets by Mosel Vitelic Corp

Published: Apr 16, 2005 |