V55C2128164V - 128Mbit LOW-POWER SDRAM

Datasheet Summary

Description

Pkg.

Features

4 banks x 2Mbit x 16 organization.
High speed data transfer rates up to 166 MHz.
Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge.
Single Pulsed RAS Interface.
Data Mask for Read/Write Control.
Four Banks controlled by BA0 & BA1.
Programmable CAS Latency:1, 2, 3.
Programmable Wrap Sequence: Sequential or Interleave.
Programmable Burst Length: 1, 2, 4, 8, Full page for Sequential Type 1, 2, 4, 8 for Interleave Type.

Mosel Vitelic Corp

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Datasheet Details

Part number	V55C2128164V
Manufacturer	Mosel Vitelic Corp
File Size	591.51 KB
Description	128Mbit LOW-POWER SDRAM
Datasheet	V55C2128164V Datasheet
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Full PDF Text Transcription

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MOSEL VITELIC V55C2128164V(T/B) 128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16 PRELIMINARY 6 System Frequency (fCK) Clock Cycle Time (tCK3) Clock Access Time (tAC3) CAS Latency = 3 Clock Access Time (tAC2) CAS Latency = 2 Clock Access Time (tAC1) CAS Latency = 1 166 MHz 6 ns 5.4 ns 5.4 ns 19 ns 7PC 143 MHz 7 ns 5.4 ns 5.4 ns 19 ns 7 143 MHz 7 ns 5.

Published: Apr 16, 2005 |