V61C31161024 Description
The V61C31161024 is a 1,048,576-bit static random-access memory organized as 65,536 words by 16 bits. Inputs and three-state outputs are TTL patible and allow for direct interfacing with mon system bus structures. 0.5 August 1999 1 MOSEL VITELIC Pin Descriptions A0 A15 Address Inputs These 16 address inputs select one of the 64K x 16 bit segments in the RAM.
V61C31161024 Key Features
- 44-pin TSOP (Standard)
- 44-pin 400 mil SOJ s Low Power Consumption
- Active: 140mA
- Standby: 2mA (CMOS)
- Access Time (ns) 12
- Temperature Mark Blank