V61C3181024 Description
The V61C3181024 is a 1,048,576-bit static random-access memory organized as 131,072 words by 8 bits. Inputs and three-state outputs are TTL patible and allow for direct interfacing with mon system bus structures. The V61C3181024 is available in 32-pin SOJ and TSOP.
V61C3181024 Key Features
- 32-pin TSOP
- 32-pin 300 mil SOJ
- Access Time (ns) 12
- Temperature Mark Blank