SN54LS373 Datasheet (PDF) Download
Motorola Semiconductor
SN54LS373

Key Features

  • Eight Latches in a Single Package 3-State Outputs for Bus Interfacing Hysteresis on Latch Enable Edge-Triggered D-Type Inputs Buffered Positive Edge-Triggered Clock Hysteresis on Clock Input to Improve Noise Margin Input Clamp Diodes Limit High Speed Termination Effects
  • SN54/74LS374