SN54LS95B Datasheet | Motorola Semiconductor

DESCRIPTION The LS95B is a 4-Bit Shift Register with serial and parallel synchronous operating modes. It has a Serial (DS) and four Parallel (P 0 - P3) Data inputs and four Parallel Data outputs (Q0 - Q3). The serial or parallel mode of operation is controlled by a Mode Control input (S) and two Clock Inputs (CP1) and (CP2). The serial (right-shift) or parallel data transfers occur synchronous with the HIGH to LOW transition of the selected clock input. When the Mode Control input (S) is HIGH, CP2 is enabled. A HIGH to LOW transition on enabled CP2 transfers parallel data from the P0 - P3 inputs to the Q0 - Q3 outputs. When the Mode Control input (S) is LOW, CP1 is enabled. A HIGH to LOW transition on enabled CP1 transfers the data from Serial input (DS) to Q0 and...